Signals have to get into the FPGA and out of the FPGA. Here we need input/output pins. Here we will have a closer look.
Content of this Episode:
* I/O pad
* Logic block
* I/O standards
* Single-Ended Standards
* Differential Standards
* Key Considerations for I/O Standards
And for now come into our Newsletter and also follow us on LinkedIn.
The post WFP033 – FPGA I/Os appeared first on World of FPGA by David Kirchner.
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16:42
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16:42
WFP032 – FPGA Routing
We have an internal digital highway inside an FPGA to connect all the different blocks. This highway has a lot of interesting features.
Content of this Episode:
* Routing Resources
* Connection lines
* Connection boxes
* Switching boxes
* But it depends
* Routing process
* Routing Algorithms
* Routing key challenges
And for now come into our Newsletter and also follow us on LinkedIn.
The post WFP032 – FPGA Routing appeared first on World of FPGA by David Kirchner.
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17:23
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17:23
WFP031 – FPGA Memory
Memory is essential for a lot of things in your FPGA design. And FPGAs have a lot of different memory.
Content of this Episode:
* Flip-Flops
* SRAM blocks
* Ultra RAM
* Flash Memory
* High Bandwidth Memory
* Memory-Controller
* External Memory
And for now come into our Newsletter and also follow us on LinkedIn.
The post WFP031 – FPGA Memory appeared first on World of FPGA by David Kirchner.
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11:20
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11:20
WFP030 – FPGA Conference 2025
It was time for a little trip again. I went to Munich to the three-day FPGA conference of PLC2 and the Vogel Verlag.
* FPGA Conference the biggest event in Europe
* Some facts
* 3 days
* 430 Participants
* 128 Lectures
* 110 Speakers
* 39 Exhibitors
* This year triple anniversary
* 40 years FPGA
* 30 years PLC2
* 10 years FPGA Conference
* All my visited talks
* Welcome to the Post-European Cyber Resilience Act (CRA) Era
* FPGAs and the Cyber Resilience Act
* Cyber Resilience Act: Planning your Security Future
* Making Simple FPGA Testbenches – Utilising Important Quality Measures
* A Cuckoo Hash-Based CAM Architecture for FPGA and ASIC Implementations
* Elevate your Design: Security and Power Efficiency with AMD Spartan UltraScale+ FPGAs
* Faster Change of Probe Signals using the Vivado Logic Analyzer
* Warning! Your FPGAs & SoC FPGAs are Under Attack
* Functional Safety for Hardware and Software
* Security, Regulations and FPGA-Based Systems – How to Make Your System Secure
* Verify the Bits that Fly : A Demonstration of Bitstream to HDL Equivalence Checking
* Why VUnit?
* Managing and Versioning Gateware Source Code on Git with Hog
* A Baseboard Management Controller for FPGA/SoC Board Supervision and Faster Bringup
* GateMate FPGA: Qualification for Radiation-Tolerant Applications
* GateMate FPGA: High-Speed Transceiver (SerDes) Hands-On
* Project-Based and Non-Project-Based Scripting in Vivado
* Multi-Run Management Using Vivado
* How to Drive Parallel High-Speed Circuits from an AMD FPGA
Next FPGA conference is from 30 June - 2 July 2026
And for now come into our Newsletter and also follow us on LinkedIn.
The post WFP030 – FPGA Conference 2025 appeared first on World of FPGA by David Kirchner.
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35:10
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35:10
WFP029 – FPGA DSP
How can FPGAs calculate so fast? The secret inside an FPGA is a digital signal processing block.
Content of this Episode:
* What does DSP stand for?
* Common parts inside an DSP block
* Function representation
* Important facts
And for now come into our Newsletter and also follow us on LinkedIn.
The post WFP029 – FPGA DSP appeared first on World of FPGA by David Kirchner.
Sverige